1. Field of the Invention
This invention relates to electronic logic circuitry, and more particularly to logic circuitry capable of being implemented in gallium arsenide.
2. Description of the Related Art
Logic circuits have been implemented using both bipolar and junction field effect transistor (JFET) technology. One significant limitation of bipolar circuit configurations is that at present they cannot be successfully implemented in gallium arsenide (GaAs), which is a high speed medium. Most JFETs similarly cannot be implemented in GaAs. However, GaAs is a suitable medium for one type of JFET, referred to as a MESFET (metal semiconductor field effect transistor). Unlike most JFETs in which the gate contact is established by a bipolar p-n junction, with MESFETs the gate junction is formed by a Schottky diode metal-semiconductor junction. In addition to compatibility with GaAs, MESFETs are much smaller than other JFETs and make possible circuitry that occupies significantly less chip area.
In the MESFET area, direct coupled FET logic (DCFL) circuits have been proposed which are particularly useful in applying high speed GaAs to very large scale integrated (VLSI) circuitry, but are also applicable to other semiconductor materials such as silicon. In these circuits, the output of one logic stage is normally used as the input to another logic stage. Since the input element of any given stage is normally an enhancement-type MESFET, for which the gate-source voltage drop is limited to about 0.7 volts, there is an upper voltage limit of about 0.7 volts for the high output of any particular logic stage which is connected as an input to another stage. This relatively low voltage swing makes the output susceptible to noise problems.
A number of known circuits are described in an article by Long et al., "Noise-Margin Limitations on Gallium-Arsenide VLSI", IEEE Journal of Solid-State Circuits, Vol. 23, No. 4, August 1988, pages 893-900. One such circuit, a NOR gate, is shown in FIG. 1. In this circuit enhancement MESFETs T1, T2 and T3 are used for switch transistors, and a depletion MESFET T4 serves as an active load current source. The depletion MESFET T4 has its gate and source connected together, so that it is always conducting. Its drain is connected to a positive voltage line V* so that the device functions as a current source. A 3-input NOR gate is illustrated, with inputs A, B and C applied to the gates of enhancement switching MESFETs T1, T2 and T3, respectively. The sources of the three switching transistors are connected to ground. The output is taken from the drains of the switching transistors and applied to the next stage. The switching transistors T1-T3 may be either conducting or non-conducting, depending upon the input signals A, B and C applied to their gates.
When the input to one of the enhancement-type switching MESFETs is high, electrons collect in its channel and it becomes conductive. Its channel resistance is then lower than that of depletion-type MESFET T4, holding the output voltage closer to ground than to V*. When the circuit input is low, on the other hand, the switching MESFET is non-conductive and the conducting channel of T4 holds the output voltage at a much higher level.
Since the circuit output is connected as an input to the gate of a MESFET in the next stage, the output voltage for the first stage is limited to about 0.7 volts. If it attempted to go to a higher voltage, the input MESFET for the next stage would behave like a diode. The low voltage output for this circuit, which is produced when high logic inputs are applied to each of the switching transistors T1-T3, is about 100 mV. Thus, the total output voltage swing between high and low states is about 0.6 volts. Furthermore, the circuit is inoperative at elevated temperatures on the order of 150.degree. C., at which the voltage threshold of an enhancement MESFET drops to about zero.
Another prior logic circuit implemented with MESFETs in GaAs is shown in FIG. 2. This circuit is produced by Triquint Corporation under the designation ZFL, and employs depletion MESFETs. A current source MESFET T5 supplies current from the positive voltage reference V* to the drain of an input depletion MESFET T6 and the gate of another depletion MESFET T7. A capacitor C1 is connected across T5 to mitigate processing variations in the current source, while T7 is connected in series with another depletion MESFET T8 between the high and low voltage references V* and V- (V- can be ground). A diode D1 at the source of T6 provides a gate signal for T8, while the output is taken from the drain of T8 and source of T7.
While the circuit of FIG. 2 provides an inversion function, its operation is limited. As with the circuit of FIG. 1, its output voltage swing is limited to about 0.6 volts. Furthermore, its performance is heavily temperature dependent. There is also a problem in turning T8 fully on when the output should be low, because of a leakage current through D1.
Output voltage swings greater than 0.6 volts have been obtained with other MESFET circuits, but such circuits require more than the two voltage reference levels used in the circuits described above. Examples of such circuits are shown in FIG. 2 of the Long et al. article mentioned above (three reference voltage levels), and in FIG. 2 of a paper by Eden, "Capacitor Diode FET Logic (CDFL) Circuit Approach for GaAs D-MESFET ICs", IEEE Gallium Arsenide Integrated Circuit Symposium, October 1984 (five reference voltages). The use of more than two reference voltage levels increases both the complexity and cost of the overall circuit.
The problem caused by the low voltage MESFET threshold at elevated temperatures is compounded by technical factors encountered in the design and implementation of reliable circuits for practical applications. For example, in high integration microcircuit design, the package thermal resistance can easily raise die temperatures by 25.degree. C., with the result that a logic circuit designed to operate at 125.degree. C. will become inoperative at an actual operating temperature of 150.degree. C. The consequence of increased temperature on the prior art logic circuits described with reference to FIGS. 1 and 2 is that switching becomes unreliable and ultimately inoperative as the temperature approaches 150.degree. C., and the voltage thresholds of the enhancement MESFETs decrease to very low levels.
Enhancement MESFETs are typically made with a threshold voltage of between 100 mV and 200 mV. This is fixed, because to turn the device on, it is required to have the gate to source voltage at three or more times the threshold voltage. At the same time, to turn the device off, the gate must be at significantly less than the threshold voltage. Over temperature, the threshold voltage changes. The threshold voltage drops by about 1 mV for every degree Centigrade increase in temperature.
Starting with a threshold voltage of 100 mV at 25.degree. C., the threshold will drop to zero if the temperature is increased to 125.degree. C. The gate to source voltage then has to be negative to turn the device off. This effect has prevented known logic circuits using MESFETs from being successfully implemented in configurations having only two voltage levels.